1. Field of the Invention
The present invention relates to a driver circuit apparatus and an operating method and more specifically relates to a driver apparatus where a noise and a consumed current at the time of switching can be decreased and an operating method thereof.
2. Description of the Background Arts
In the case of driving a certain circuit apparatus by an output signal from another circuit apparatus, a driver circuit is used for obtaining a sufficient level of a driving current. For example, in a microcomputer system shown in FIG. 9, when a memory unit 101 and peripheral units 102 and 103 are to be driven by an output signal from a microcomputer 100, output terminals of the microcomputer 100 are connected to a bus line via a bus line driver 104, and the memory unit 101 and the peripheral units 102 and 103 are connected to the bus line 105.
FIG. 10 is a circuit diagram showing a structure of a conventional driver circuit being used for the bus line driver 104 or the like. The driver circuit in FIG. 10 is comprised of a complementary MOS integrated circuit (hereinafter referred to as "CMOS circuit").
A circuit portion 22 of the driver circuit in FIG. 10 is comprised of a P-channel MOS transistors 17 and 19 and N-channel MOS transistors 18 and 20. The transistors 17 and 18 constitute an output circuit whereas the transistors 19 and 20 constitute an output prestage circuit. The output circuit and the output prestage circuit are connected between a power supply terminal 3 and a ground terminal 4. A power supply potential (Vcc potential) is applied to the power supply terminal 3 while a ground potential (GND potential) is applied to the ground terminal 4. When a "L" level (GND potential) signal is applied to an input terminal 1, the transistors 19 and 18 are turned on while the transistors 20 and 17 are turned off. Thus, a potential at an output terminal 2 becomes the "L" level (usually, approximately at GND potential). To the contrary, if an "H" level (Vcc potential) signal is applied to the input terminal 1, the transistors 20 and 17 are turned on while the transistors 19 and 18 are turned off. Thus, the potential at the output terminal 2 becomes the "H" level (usually, approximately at Vcc potential).
As the transistors 17 and 18 for the output circuit, transistors larger in size than those in other circuits, are used for obtaining a sufficient driving current. Usually, the transistors 17 and 18 for the output circuit have the driving capability three to four times larger than that of the transistors for other circuits.
FIG. 11 is a circuit diagram showing the structure of other driver circuit of a conventional type. The driver circuit in FIG. 11 is a three-state driver circuit whose output becomes an high impedance state in addition to a "H" level and a "L" level.
The driver circuit in FIG. 11 differs in the following points from the driver circuit in FIG. 10. More specifically, in the circuit portion 72, a P-channel MOS transistor 51 and an N-channel MOS transistors 52 are connected between the transistors 19 and 20 in the output
prestage circuit. Further, a P-channel MOS transistor 53 is connected in parallel with the transistor 19, and an N-channel MO transistor 54 is connected in parallel with the transistor 20. The gate terminals of the transistors 52 and 53 are connected to a control terminal 55, whereas the gates of the transistors 51 and 54 are connected to a control terminal 56. A control signal .phi. is applied to the control terminal 56, while a control signal .phi. which is an inversion signal of the control signal .phi. is applied to the control terminal 55.
When the control signal .phi. is at the "H" level and the control signal .phi. is at the "L" level in the driver circuit shown in FIG. 11, the transistors 51 and 52 are turned on while the transistors 53 and 54 are turned off. In the case, the driver circuit in FIG. 11 performs the same operation as that of the driver circuit in FIG. 10. Further, when the control signal .phi. is at the "L" level and the control signal .phi. is at the "H" level, the transistors 51 and 52 are turned off while the transistors 53 and 54 are turned on. Thus, the transistors 17 and 18 are turned off, and the output terminal 2 becomes in a high impedance state.
FIG. 12 is a diagram showing an equivalent circuit in the case that the driver circuit in FIG. 10 or 11 has been actually mounted on a circuit board. In FIG. 12, an inductance L1 of the supply line and a parasitic capacitance or a load capacitance C1 exist between the supply terminal 3 and the output terminal 2. In addition, an inductance L2 of a ground line and a parasitic capacitance or a load capacitance C2 exist between the ground terminal 4 and the output terminal 2.
When the driver circuit in FIG. 10 or 11 is actually mounted on a circuit board in this way, the inductances L1 and L2 as well as the capacitances C1 and C2 are added thereto as shown in FIG. 12, so that the voltage waveform appearing at the output terminal at the time of switching contains the ringing as shown in FIG. 14A.
This ringing is caused when the electric charge stored into the output terminal 2 is discharged to the ground line through the N-channel MOS transistor 18 in the output circuit and also when the electric charge is charged into the output terminal 2 through the P-channel MOS transistor 17 in the output circuit from the power source line. The charging and discharging are performed also in circuits other than the output circuit. However, since the driving capability of the transistors in the output circuit is sufficiently larger (usually, at least three to four times) as compared with the driving capability of the transistors in other circuits, the charging and discharging by the transistors in the output circuit will be influential as far as the generation of ringing is concerned.
FIG. 13A is a diagram showing an equivalent circuit relating to the portion of the N-channel MOS transistor 18 in the output circuit shown in FIG. 12. In FIG. 13A, RO1 denotes an ON-resistance of the N-channel MOS transistor 18, whereas a switch SW1 denotes for the ON/OFF function of the N-channel MOS transistor 18.
Now, if the switch SW1 is closed (when the N-channel MOS transistor is turned on), the electric charge stored in the capacitance C2 is discharged to the ground line through the resistance RO1. As a current flows to the inductance L2, a voltage "e" according to the following equation is generated. EQU e=L2.times.(di/dt) (1).
where, di/dt denotes translation of current flowing to the inductance L2 in an infinitesimal time dt. inductance L2, and "t" represents time. Since the inductance L2, the capacitance C2 and the resistance RO1 constitute an LCR oscillation circuit, in FIG. 13A, the ringing as shown in FIG. 14A is generated.
Since the LCR oscillation circuit is formed in the above described conventional driver circuit, the ringing is likely to appear in an output waveform. Further, if the output current capacity (driving capability) in the driver circuit should be set to a large value like 200 to 300 mA, for instance, at Vcc=5V, the "di/dt" in the above equation (1) increases, so that the peak value in the ringing becomes greater. As a result, noise such as the ringing being generated at the time of switching bring about an erroneous operation to other systems.
Moreover, when the signal being applied to the input terminal 1 changes to the "L" level from the "H" level, or when the signal being applied to the input terminal 1 changes to the "H" level from the "L" level, there appears a period when the P-channel MOS transistor 17 and the N-channel MOS transistor 18 become conductive simultaneously so that a penetration current flows to the ground terminal 4 from the power supply terminal 3. Thus, a consumed power is increased.